Atomic transistors based on seamless lateral metal-semiconductor junctions with a sub-1-nm transfer length

The edge-to-edge connected metal-semiconductor junction (MSJ) for two-dimensional (2D) transistors has the potential to reduce the contact length while improving the performance of the devices. However, typical 2D materials are thermally and chemically unstable, which impedes the reproducible achievement of high-quality edge contacts. Here we present a scalable synthetic strategy to fabricate low-resistance edge contacts to atomic transistors using a thermally stable 2D metal, PtTe2. The use of PtTe2 as an epitaxial template enables the lateral growth of monolayer MoS2 to achieve a PtTe2-MoS2 MSJ with the thinnest possible, seamless atomic interface. The synthesized lateral heterojunction enables the reduced dimensions of Schottky barriers and enhanced carrier injection compared to counterparts composed of a vertical 3D metal contact. Furthermore, facile position-selected growth of PtTe2-MoS2 MSJ arrays using conventional lithography can facilitate the design of device layouts with high processability, while providing low contact resistivity and ultrashort transfer length on wafer scales.

. According to the Schottky-Mott rule, a small SBH can be achieved by using low-WF metals for n-type semiconductors (e.g., SBH = WF -χ, where χ is the electron affinity of monolayer MoS2 (≈ 4.28 eV) 5 ). : Because the liquid-like eutectic phase has only PtTe2 crystal (liquid ⇔ Te (s) + PtTe2 (s)) at a growth temperature of ~700 o C ( Supplementary Fig. 2b), we were not concerned about the formation of other phases such as Pt2Te3 or Pt3Te4. The unreacted Te evaporates during the growth because of the high Te vapor pressure, resulting in high-quality PtTe2 directly on top of the substrate. Supplementary Fig. 2c shows the HAADF-STEM image of PtTe2 displaying the periodic atomic arrangement of PtTe2 with a (110) lattice plane spacing of ~0.20 nm, which is in agreement with the atomic structure of the mechanically exfoliated flakes 63 . The corresponding SAED pattern (inset of Supplementary Fig. 2c) shows the specific set of diffraction spots, indicating the single-crystalline nature of the as-grown PtTe2. Representative signals for pure PtTe2 were further verified by XRD characterization (Supplementary Fig. 2d) as corresponding to the three (001l) planes, which signify that the structures are highly aligned with the c-plane-orientation. Furthermore, XRD peaks related to by-products or indicating an incomplete reaction (e.g., Pt or Te) were absent. XPS characterization showed strong signals corresponding to Pt-Te binding energies from Te 3d and Pt 4f scans (Supplementary Figs. 2eg). Owing to its high crystallinity, the PtTe2 surface showed filled energy levels as a metal without any forbidden gap, indicated by the sudden increase in intensity at the binding energy (Eb) of 0 eV in the UPS spectrum (inset of Supplementary Fig. 2h). On the other hand, the secondary electron cutoff in the UPS spectrum ( Supplementary Fig. 2h) shows an x-intercept of ~4.65 eV, which corresponds to the WF of the PtTe2. The TEM sampling for the plain view was conducted under ambient air for ~3 h; thus, all the Te-terminated edges correspond to those of a clean, high-quality crystal without significant oxidation. The positive differential Gibbs free energies of adsorption of both H2O (46.3 KJ mol -1 ) and O2 (1.8 KJ mol -1 ) on PtTe2 surfaces at 300 K reported in a previous study 7 may have prevented the adsorption of oxygen-related molecules on our PtTe2 sample under ambient.
: To confirm the intrinsic thermal stability of PtTe2 surface, we produce the PtTe2 with a ultrathin layer with a 4 nm thickness. The power-based growth method was used instead of eutectic solidification; tellurization of a Pt precursor thin film at ~400 °C under low pressure (< 10 -1 Torr) under H2 flow (5 sccm). The thin film was found to be polycrystalline with an average grain size of ~30 nm. Heat treatment up to 850 o C did not induce a change in the XPS spectrum of the Pt-4f core levels, which had binding energies of 75.8 (4f5/2) and 72.4 (4f7/2) eV with respect to the as-grown sample, whereas the spectrum of the crystal annealed at 875 o C showed peaks shifted to lower energies (Supplementary Figs. 4d,e). Similarly, the XPSextracted stoichiometries were almost perfect up to T ≈ 825 o C; however, the samples annealed at the higher T (> 850 o C) showed Te-deficiency (e.g., at. % (Te/Pt) ≈ 1.18 at T = 875 o C.
The loss of Te at T above ~850 °C was also reflected in the XRD patterns ( Supplementary  Fig. 4c, d). The peak corresponding to the (001) plane was shifted from 2θ = ~16.71 to ~12.99°, due to the formation of PtTe with a wider interplanar spacing of ~0.67 nm 65 (compared to ~0.52 nm for PtTe2 66 ). Note that the Raman spectrum of the single crystal annealed at 1,000 o C (yellow in Fig. 1c) also indicates the formation of PtTe, with new peaks at ~92, ~120, ~169, and ~186 cm -1 corresponding to the characteristic modes of PtTe (ref. 10 ). The WFs characterized by ultraviolet photoelectron spectroscopy (UPS) ranged from 4.60 to 4.65 eV ( Supplementary Fig. 4g) for the samples with T below 825 °C; however, annealing at a higher T (> 850 °C) shifted the WF to ~4.90 eV, which resembled that of Pt (ref. 11 ) (~4.90 eV).

Supplementary Fig. 5. Two-terminal electrical characterization of PtTe2 crystals. (a-b)
The electrical characterization of the pristine PtTe2 crystals, (a) output and (b) transfer curves for an as-prepared PtTe2 crystal. The two-terminal resistivity (ρ ≈ 0.37 mΩ·cm) was calculated by linear fitting of the output curve. (c-d) The electrical transport through the PtTe2 region after the two-step growth of the lateral heterostructure fabricated with MoS2. (c) Output curve showing the similarly low resistance properties (ρ ≈ 0.35 mΩ·cm), sustaining within ~10% change. The change in ρ can be attributed to measurement error or to increased resistance with the contact pad caused by annealing. (d) Transfer characteristics of PtTe2 after high-temperature CVD, showing the insignificant gate modulation of the conductivity. Supplementary Fig. 6. Adsorption energy comparison of MoS2 monomer on basal plane and edge surface of pristine and defective PtTe2. The adsorption energy represents the binding energy when a MoS2 monomer is forcibly attached, but has no effect on the further development of MoS2 growth.
: DFT simulations were performed to investigate the selective nucleation of MoS2 on the edges of PtTe2. Adsorption energy calculations reveal that there was preferential adsorption and subsequent nucleation of MoS2 at the PtTe2 edge. For instance, the MoS2 monomer exhibited a lower adsorption energy of -3.6 eV at the PtTe2 edge compared to -2.7 eV on the PtTe2 basal plane. This substantial difference in the adsorption energy may explain the edge-mediated growth of MoS2. Conversely, the energy calculation for the defective PtTe2-x with Te monovacancy had a different tendency than our actual case. The high thermal stability of PtTe2 and its highly stoichiometric nature (Te/Pt atomic ratio ≈2) after the thermal CVD of MoS2 were validated in Figs. 1c and 3d, and Supplementary Fig. 4. The calculation results for defective, nonstoichiometric PtTe2-x indicate that preferential growth of vertically overlapped MoS2 on PtTe2-x can occur. This result is consistent with the growth of the overlapped MoS2 layer on the basal plane of the defective PtTe2-x at a high T = 800 o C in our experiment (at which T is higher than in our typical case of ~670˗700 o C). : XPS analysis revealed that there were no significant changes in the stoichiometry of PtTe2 (~1.80), although the binding energies of Pt and Te shifted to lower levels (to ~600 meV) ( Supplementary Figs. 8a, b). Recalling the negligible XPS peak shift of the Te-deficient sample annealed at T = 850 °C in Supplementary Fig. 4, the observed energy shift in Supplementary Figs. 8a, b may be related to the increased carrier density in the vicinity of PtTe2 by the stitching of MoS2 layer rather than the change in stoichiometry 69 . In contrast, the XPS spectra for the MoS2 layer do not show a substantial peak shift compared to those of the non-stitched bare flakes. This suggests that our growth mode led to the MoS2 layer acquiring the intrinsic surface properties of a 2D semiconductor because the MoS2 layer was grown after the preparation of PtTe2. : The existence of a vertical layer attached to some PtTe2 explains how the dangling bond at the edge, in addition to the basal plane, could provide an adequate location for MoS2 nucleation. However, the vertical MoS2 was not connected to the lateral MSJ and grew independently ( Supplementary Fig. 11a), as concluded by the following observations: (i) First, the Moiré patterns of the lateral MoS2 multilayer appeared as underlying vertical MoS2 ( Supplementary Fig. 11e). If the structures were connected to each other, the Moiré patterns would not be observed underlying the vertical pattern. (ii) Second, two different vertical MoS2 layers were separated from each other, whereas the underlying MoS2 was continuously grown ( Supplementary Fig. 11f). Because the vertical structure was isolated, as depicted in Supplementary Fig 11a, our lateral MSJ could have a monolayer-thick interface. The carrier injection path was not related to the vertical structure, rather to the atomically thin MSJ interface; thus, the atomic MoS2 transistor could be justified.
In our actual structural characteristics, most MSJs possessed laterally stitched components without vertical structures. In addition, we could not find vertically stitched MoS2 near PtTe2 when the PtTe2 thickness was less than ~10 nm, as is often the case for patterned PtTe2 layers in position-controlled heterostructures ( Supplementary Fig. 11b).
We propose the following growth mechanism: The growth of MoS2 relies on the adsorption of Mo-based precursors (e.g., MoOx) and their conversion to MoS2. In thicker flakes, the high density of exposed dangling bonds and the step-like surface of PtTe2 can provide a large surface for the adsorption of vapor-phase MoOx. Because the edges of the PtTe2 planes are the locations where the basal plane of MoS2 can grow along the surface (i.e., (001)PtTe2//(110)MoS2), the conversion from MoOx to MoS2 results in the vertical growth of MoS2. This growth mechanism resembles those reported previously for Au-MoS2 (ref. 14 ) or MoO3-MoS2 core-shell structures 15 . However, in our experiments, the dangling-bond free PtTe2 basal plane prevented the adsorption of MoOx and the subsequent formation of an out-of-plane overlapped heterostructure. In contrast, for MoOx adsorbed near the interface between PtTe2 and the SiO2/Si substrate, the substrate beneath PtTe2 could promote the in-plane lateral epitaxy of MoS2 whereas PtTe2 provided heterogeneous nucleation sites.

Supplementary Fig. 12. Top-view atomic configurations of MoOx and S dimers during
MoS2 growth at PtTe2 edge. The value of ΔE below each illustration represents the energy of the process relative to that of the PtTe2 + 2MoO3 atomic structure. Gas-phase S tends to react with MoOx. This results in the desorption of SO2 and the promotion of MoOx reduction. The final MoS2 structure rather than MoOx is the most stable structure because the calculated ΔE of the former is the smallest (~ -19.49 eV) among the steps.
: The initial atomic configuration of the PtTe2 edge was assumed to have 50 % Te coverage, and the termination of the as-grown PtTe2 flake was confirmed by STEM study ( Supplementary  Fig. 3). As shown in Supplementary Table 2, the relative energy (ΔE) of the possible intermediates of MoOx and S adsorbents attached to the PtTe2 edge were evaluated, indicating the relative stability of each atomic structure. Reactive, gas-phase S atom is likely bound to MoO3 dimers attached to the edge of PtTe2 (ΔE < -2.88 eV), and O in MoO3 tends to desorb since it reacts with additional S forming SO2. This is owing to the exothermic processes in the single-layer model calculations. The similar reduction process for MoO3-x repeated to form the most stable structure of MoS2, because its energy relative to the initial atomic structure was substantial (ΔE = -19.49 eV). A previous study for the structural evolution of the MoS2-Mo2C interface 16 reported that the exothermic (ΔE < 0 eV) and endothermic (ΔE > 0 eV) steps were mixed during the interface generation steps in the DFT calculations. In contrast, the lateral epitaxy of MoS2 to the PtTe2 edge interface in this study was driven by multiple exothermic steps, indicating that the reaction is relatively favorable.  Supplementary Fig. 13b, and then the MoS2 grows continuously (the calculated relative energy also validates each reaction process conducted for MoS2 dimers in Supplementary Fig. 12a.). Although the atomic termination of MoS2 was strained to form bonds with PtTe2, there were no dangling bonds at the MoS2/PtTe2(010) interface, as shown in Figure  R3a, indicating a semi-coherent interface. The periodic interfacial cell repeatedly forms the lateral MSJ heterostructure, as shown in the three periodic cells displayed as white arrows in the STEM image in Supplementary Fig. 13d. The regular matching of the atomic sites indicates their (semi-)coherency. The TEM diffractograms of the PtTe2-MoS2 heterostructure (Figs. 1i and 3h) also demonstrate a well-defined orientational consistency between the 2D materials in two different directions (i.e., epitaxial relation of the (110) and (100) planes), which could not be realized in an incoherent interface with large misfits. TLM plots for Ti/PtTe2 devices with different channel thicknesses (H). Each data point corresponds to the total resistance (R) of one device. Linear plots were fitted to the different TLM sets to extract the average 2Rc values corresponding to the y-intercepts. The PtTe2 channel here was synthesized using the method described in Fig. 3a.
: We extracted the Rc values between the Ti/Au and PtTe2 thin films (~4 and ~8 nm) using the TLM, as shown in Supplementary Fig. 16. The average Rc values were ~230 ± 20 and ~120 ± 30 Ω·μm for the ~4 and ~8 nm-thick PtTe2 films, respectively. Compared to the TLM-driven Rc of the PtTe2-MoS2 MSJ (168 ± 127 kΩ·μm; Fig. 4f), the influence of Rc at the Ti/PtTe2 interface was trivial (~0.13%). The estimated Rc of the Ti/PtTe2 interface was almost equal to the lowest value obtained for 3D metal/vdW metal interfacial systems and smaller than that of the most widely used vdW metal, graphene. Efficient carrier transfer from a 3D metal to a vdW metallic layer is dependent on the differences between their (i) DOS and (ii) WFs because these quantities determine the DOS-limited dipole layer at the interface 17,18 . For example, the negligible DOS in the vicinity of the Dirac point in graphene results in a longer charge-transfer region at the interface (i.e., increased screening length) 19 . Compared to graphene, the anisotropically contacted electron and hole pockets in the Type II Dirac semimetal PtTe2 produce a finite DOS around the Dirac point 20 with a higher carrier concentration (> 6×10 22 cm -3 ) 21 , which led to better transport at the 3D metal/PtTe2 contact interface. Furthermore, the small WF difference between PtTe2 and Ti (~200 meV) resulted in a smaller potential difference in the dipole layer. We also note that the wetting property of Ti evaporated on the PtTe2 surface can reduce the equilibrium separation between PtTe2 and Ti, which can be regarded as being smaller than the PtTe2 vdW gap (~2.5 Å). Given the negligible impact of the vdW gap with a small separation (~3.3 Å) in Au/graphene 19 , the tunnel barrier in our Ti/PtTe2 system might also be insignificant. The strong interlayer interaction of PtTe2, as indicated by its vdW gap (~2.5 Å) being smaller than the intrinsic layer thickness (~2.7 Å) 21 , can result in an invariance of the contact resistance properties with respect to variations in the thickness similar to that in WTe2 (ref. 22 ). : The perfect FLP-free formation of SBH for the PtTe2-MoS2 MSJ can be challenging, primarily attributed to the modified potential of the heterostructure by dipole-induced FLP, following an approach suggested by refs. [23][24][25] . In every MSJ system, an electron density rearrangement at any MSJ happens attributed from the overlapping wavefunctions of metal and semiconductor; thus, forming so-called metal-induced gap states (MIGS) 26,27 . According to previous reports for top contacts to 2D semiconductors, the charge redistribution modifies SBH even without the chemical reaction between 3D metal and MoS2, as the XPS studies for Pd on the MoS2 surface revealed that a considerable band bending and Pd's WF decrease from 5.55 eV to 4.84 after its deposition 28 . This dipole-induced FLP can be alleviated by introducing an interlayer between the metal and semiconductor, where the MIGS are likely to degrade as interlayer thickness increases 29,30 .
Accordingly, in every MSJ, the transfer of carriers between the interface state and metal can result in potential formation due to the dipoles, which modify the ideal bandbending profile (Vfinal = Videal + Vdipole; Supplementary Fig. 18a) [23][24][25] . The strong covalent bonds between PtTe2 and MoS2 can also induce a charge transfer (recalling the XPS peak shift of Pt-Te bindings in Supplementary Fig. 6), resulting in the formation of a dipole potential (Vdipole), although the distribution was confined to few-layered MoS2. We calculated Videal as a function of the distance (x) from the junction interface toward the 2D semiconductor by using Poisson's equation 23 : where qVp is the contact potential calculated by qVp = (WF -χ) -(Ec -Ef) and Wd is estimated by the following expression: The WF for the calculation for PtTe2 was ~4.65 eV ( Supplementary Fig. 2h), χ is ~4.28 eV and ε was ~4 for monolayer MoS2 (refs. 5,31 ). As for the computations in Supplementary  Fig. 18a, we used the values of 10 meV for Ec-Ef, and n3D of ~10 18 cm -3 , which is validated for the highly n-doped MoS2 FET with a threshold voltage (Vth) of ~14.6 V for our devices ( Supplementary Fig. 14) by considering the 2D carrier density of a 300-nm-thick SiO2 dielectric layer (n2D = Cox(Vg-Vth)/q, where Vg = 0 V). Regarding the potential established due to the dipole charges (Vdipole), the parallel rectangular contact width (W = ∞) and thickness (H = 0.7 nm for monolayer MoS2) of the edge contact was considered with a separation of d (~0.32) 23,81 as expressed by: Here, E(x) is the electrical field caused by dipoles at the heterostructure as follows: The heavy n-type doping of MoS2 decreases both the conduction band offset with respect to the Fermi level (EC-Ef) and the depletion width (Wd). This also results in greater carrier injection because the effect of Vdipole on Vfinal increases as Wd decreases (Supplementary Fig.  18b). Since monolayer MoS2 was grown by CVD, the high-temperature-driven vacancies 32 and the large trap density of the substrate 33 may cause the n-doping of the MoS2, decreasing both EC-Ef and Wd, finally instigating FLP. We also suppose that the transported carriers preferred to pass through the SBH of the multilayer MoS2 interface rather than the monolayer because of the higher electron affinity (χML ≈ 4.45 eV (ref. 5 )) and higher carrier density (n3D), lowering both Videal (from ~370 meV to ~200 meV) and Wd (from ~17 nm to ~11 nm) calculated by Equations S1 and S2.
However, compared to the 3D vertical contacts, Vdipole decays more rapidly away from the interface. This is because the pinning charges at the 1D-like interface at the edge contact are modeled as dipoles in two-parallel rectangles with the width W and MoS2 thickness H, as depicted in Supplementary Figure 18d. In contrast, the top contact has a geometry with the width W and carrier transfer length LT. Therefore, away from the interface, the conventional Schottky-Mott limit alignment, that is, partial depinning of the Fermi level, is recovered in the edge contact 5,23,24,[34][35][36] . We qualitatively show the dimensional effect of the edge and top contacts on Vdipole and Vfinal. The different decay rates of Vdipole modify the total Vfinal depending on the contact geometry and reduce the influence of Videal on Vfinal at the edge interface.
: To ensure the accuracy of the Rc calculated by TLM, we extracted Rc using the Y-function method, which has been successfully applied in several studies on MoS2 FETs 40,44,45 . Compared to TLM, this approach allows the extraction of the performance parameters, despite the possibility of device-to-device variations in the Rc and Rsh of MoS2. As the Rc induced by the Schottky barrier can result in additional voltage drops at Vds (=Vds-2IdsRc) and Vg (=Vg-IdsRc), the ideal expression of Ids in the accumulation regime can be modified as; where μ0 is the intrinsic carrier mobility of the device, which is independent of the contact property. The effect of Rc on Ids, therefore, results in a sublinear increase in Ids with Vg in the inversion region, as shown in Supplementary Fig. 22a. Furthermore, the effective mobility of the device is attenuated by a factor of θ = θ0 + 2Rcμ0Cox(W/L) (where the first-order mobility attenuation coefficient, θ0, is negligible in the strong inversion region) 45 ; this in turn enables the modification of Equation S5 to: can be modified to the relationship of the commonly accepted Y-function method from the classification of the transconductance (gm = Ids/ Vg) and Y-function (Y = Ids/(gm) 1/2 ), as follows: This expression allows the extraction of 0 and Vth from the slope (S1) and x-intercept of the Y-function plot (Y vs. Vg), respectively ( Supplementary Fig. 22b). Furthermore, the relationship between Vg and 1/(gm) 1/2 can be used to calculate the attenuation factor θ, using the modified expression of Equation S6: We can also calculate Rc using the slope S1 (Y vs. Vg plot) and slope S2 of the plot of 1/(gm) 1/2 vs. Vg in the strong inversion region (Supplementary Fig. 22c) using the following expression: Fig. 23. Rc of Ti/MoS2 MSJ FET depending on the Lc calculated based on our data and a transmission line model 46,47 . The scaling in Lc of Ti/MoS2 MSJ FET can increase the Rc because of crowding effect of carrier (blue, Lc < LT). Compared to 3D vertical contacts, edge contact prospectively affords contact scalability down to the physically obtained LT of ~0.7 nm (red).

Supplementary Table 1. Comparison of growth methods to obtain lateral edge-contacted 2D vdW MSJ by the two-step CVD process.
Most studies on the lateral MSJs prepared using CVD rely on the growth of vdW metals after the preparation of vdW semiconductors because the typical vdW semiconductor (e.g., WS2, MoSe2) requires a relatively high growth temperature (700-800 o C) compared to vdW metals (e.g., 600 o C for NbS2 or VSe2) [48][49][50] .
Although graphene can be exploited to create nucleation sites for MoS2 afterward 38,39,51 , the preparation of CVD-grown graphene requires wet-transfer onto a target substrate which is a cumbersome process producing polymer-based impurities that could act as nucleation sites on the graphene basal surface 39 . Most importantly, the significant lattice mismatch between graphene and the vdW semiconductor (> 25%) hinders lateral epitaxial growth, resulting in a vertically overlapped junction 39,51 instead of pure edge contact. Furthermore, the inertness of the PtTe2 surface without the in-plane alloying is a phenomenon not observed in the studies on synthetic VS2-MoS2 (ref. 42 ) and graphene-MoS2 (refs. 39,51 ), owing to the surface roughening of VS2 under a high-temperature oxidative atmosphere 42 and transfer-induced polymer residues 39,51 .  (~0.65-80 nm). The values here are the best reported in each paper, whereas the average value from multiple devices is provided in the parentheses. Note that the graphene lateral contacts [38][39][40]51 have some vertical overlapping between the materials, which suggests that there may not be exact edge contact, where LT is longer than the thickness of the channel (starred

Supplementary Note 1. Edge-mediated growth of monolayer MoS2
To obtain monolayer MoS2, a high reaction rate at low mass flux is generally required in CVD-based synthesis of 2D TMDs 60 . In our experiments, we controlled the growth aspects by using (i) a confined space for gas precursors and a MoOx thin-film precursor, (ii) a lateral growth promoter (i.e., NaCl), and (iii) a reduced growth temperature of 700 °C.
We placed the target (PtTe2/SiO2/Si) and precursor (MoOx/SiO2/Si) substrates in a face-to-face configuration to create a confined area between the two substrates. This resulted in a reduction of the S precursor concentration (C(x,t)) inside the area as a function of the distance from the edge of the target substrate (x) given by where Cs is the concentration of the gas precursor arriving at the edge, D is the diffusion coefficient, and t is time. The decay of the mass flux (J ∝ C) with increasing x therefore prevented excessive S flux inside the confined region 61 . At the same time, the use of a MoOx thin-film precursor instead of powder precursor enabled the clean and reproducible growth of monolayer MoS2 because the amount of MoOx precursor required could be decreased by controlling the deposited thickness precisely 62,63 . The small fluxes of Mo and S significantly reduced the supersaturation level near the substrates, resulting in a very low nucleation density and an enlarged monolayer domain. They also prevented the formation of multilayers and undesired phases such as MoOxSy 63 . Using a similar strategy, Mohapatra et al. 61 successfully grew monolayer MoS2 along pre-patterned Au arrays through gas-confined CVD. In contrast, the challenges in managing the local vapor pressure of S and Mo in typical powder-based CVD result in the formation of multilayers and intermediate products.
To promote a high reaction rate for the formation of large-sized monolayer MoS2, we used a NaCl promoter coated on the corner of the MoOx precursor film. The use of alkali metal compounds resulted in the formation of alkali metal molybdates and molybdenum oxide or oxychloride compounds that transformed into monolayer MoS2 during growth. The low melting point of the intermediates increased their mobility. This reduced the number of nuclei and resulted in the preferential lateral synthesis of MoS2 at 650-700 °C 60,64 .
We further maintained the growth temperature at a reduced temperature of 650-700 °C instead of the usual 800 °C for edge-mediated growth. Previous studies on the CVD of 2D-2D lateral heterostructures 40,65 have shown that edge-mediated synthesis is reliant on the kinetic effect rather than the thermodynamic mechanism, which is predominantly dependent on the growth temperature. A high temperature (nearly 800 °C) promotes the extensive nucleation and growth of 2D semiconductors and leads to a thermodynamic preference for vertical heterostructures. In contrast, lowering the growth temperature (<750 °C) promoted edgemediated synthesis, which led to the formation of in-plane heterojunctions via a kinetic effect rather than a thermodynamic mechanism.

Supplementary Note 2. Device operation principle (i) Schottky barrier formation
Because 2D materials are thin and vulnerable to defects when typical metal electrodes are deposited onto their surfaces, process-induced defects can, in general, produce a high density of interfacial defects at the MSJ. When a large number of interfacial defects are present, the SBH becomes independent of the metal WF and is predominantly determined by the midgap states, as described in the following equation: (S11), where S (= |d(SBH)/d(WF)|) is the pinning factor, which can be statistically evaluated by plotting the SBHs of semiconductors with different metal-contact WFs. Assuming a model for the surface states and barrier height, the S value is also a function of the interface trap density (Dit) 66-68 as follows: (S12) In this model, an interfacial layer with thickness ( ) of a few angstroms and small interfacial permittivity ( ), which allows electrons with energies greater than the potential barrier to pass, was assumed. The layer is assumed to be transparent to electrons with energies greater than the potential barrier. Because the and values denote interfacial properties, they are affected by the surfaces of the metal contact and semiconductor. Accordingly, the analysis by S is a universal method to analyze the FLP for many 2D semiconductor FETs with different metal surfaces/interfaces. For example, the extraction of the S value has been frequently conducted for many vertical 3D/2D MSJ, in which the high-energy deposition of 3D metal results in the formation of an atomic metal extrusion surrounded by a 2D semiconductor 5, 47 (i.e., long ). The calculation of S was also conducted for edge contacts with a 2D semiconductor 49,51 , which provided a better understanding of the edge interfacial properties. When Dit (≈ ∞) is large enough at the MSJ interface, the SBH is described by the Bardeen limit of strong pinning, which is expressed as S = 0 (SBH = ECNLχ), whereas the Schottky-Mott limit (S = 1; SBH = WFχ) is recovered when there are minimal interfacial defects (Dit ≈0). Therefore, the value of Dit can provide a better understanding of the effect of interfacial defects in the SBH formation mechanism. For instance, assuming that = 1 nm (ref. 5 ), Dit at the 3D metal/MoS2 interface is ~2.68 × 10 14 eV -1 cm -2 . This is almost ten times larger than the Dit of a typical Sibased MSJ (~2.7 × 10 13 eV -1 cm -2 ) and induces stronger FLP in the 2D MoS2 (ref. 67 ).
This surface model implies that the edge-contact MSJ has a significant advantage because it possesses a weakened FLP effect compared to defect-rich conventional 3D metal contacts due to the atomically thin δ and smaller Dit. Because the edge contact has a 1D-like interface, the value of δ should correspond to the size of a single atom in principle. The suppression of process-induced defects (e.g., nonstoichiometric alloying, phase separation, and crystal discontinuity) leads to smaller values of Dit. Negligible δ and Dit values can lead to a weaker FLP because S can approach ~1. Through XPS and TEM analyses, we observed minimal δ and Dit values in our PtTe2-MoS2 MSJ FETs. The epitaxially grown MoS2 at the PtTe2 edge did not exhibit substantial variations in its binding energies and atomic structure compared to bare MoS2 flakes. Furthermore, the small subthreshold swing (SS) of the MoS2 FETs with PtTe2 contacts suggests that they had a smaller Dit value compared to the FETs with Ti 3D metal contacts. The SS values are typically determined using the semiconductor capacitance (Cs), dielectric capacitance (Cox), and capacitance from interfacial charges at the MoS2/oxide interface (Cit,ox) as follows: = (log 10 ) = ln 10 • (1 + + , + ) ≈ 60 mV (1 + , + ). (S13) Because the Cs, Cox, and Cit,ox values were the same in our FETs regardless of whether they contained edge or vertical contacts, the differences in the SS values between the devices were solely due to their contact properties. For example, a parasitic capacitance (Cit) in parallel to a contact resistance (Rc) can be introduced into a dielectric/MoS2/contact system [69][70][71]

(ii) Tunneling barrier formation
Another obstacle to carrier transport in the conventional 3D top-contact geometry is the presence of an extra tunneling barrier (TB) between the 2D semiconductor and 3D metal. The vdW gap at the interface has a notable contribution to this TB. Because the vdW interface has no significant orbital overlap at the interface, the resultant formation of a square tunnelling decreases the barrier field emission efficiency. According to various studies 4,72 , the quantum tunnelling probability (PTB) through the vdW gap can be calculated as where ℏ is the reduced Planck's contact, m the free electron mass, the tunneling barrier height, and Tvdw the width of the TB. Equation S14 implies that a lower barrier height and narrower width are required for higher electron injection efficiency during the tunneling process. Quantitative analysis using computational methods suggests that the values of and Tvdw span across a diverse range depending on the atomic size and orbital overlaps of the metal. Although the Ti/MoS2 MSJ had a smaller and Tvdw than those of the In, Au, and Pd interface 72 , the existence of the square TB affected carrier injection through the interface, especially when compared to the edge contact. Therefore, in the top-contact MoS2 FET with the extra TB, electrons were mostly injected through thermionic emission over the barrier. In contrast, the edge contact allowed additional injection into the channel via field and thermionic field emission due to the absence of the TB and increased orbital overlap.

(iii) Carrier transport behavior through the barriers
We illustrate the effects of the SB and TB on Vg-dependent carrier transport in top-contact Ti/MoS2 and edge-contact PtTe2-MoS2 MSJ FETs in Supplementary Fig. 19. The thermionic emission model was fitted to Figure 2i in the manuscript under the assumption that the injection current was dominated by thermionic emission carriers. This assumption is valid when Vg < VFB, in which case, the extracted ΦB is the exact value of the effective barrier height and ΦB at VFB is the true SBH of the interface. Consequently, in the Ti/MoS2 MSJ, which had a high SBH due to a large FLP, the influence of the SB resulted in ΦB values that were more than twice that of the PtTe2-MoS2 MSJ.
In contrast, when Vg＞VFB, thermionic tunneling current begins to contribute because the SBW is narrowed by band bending. Thus, in this on-state bias regime, the influence of the BW (including Tvdw) is mainly reflected mainly in the ΦB-Vg curve (Fig. 2i). The SBW values at Vg = VFB for our MoS2 with Ti (~1.5 nm) and PtTe2 contacts (~0.94 nm) could be calculated by using Equation S2 in the Supplementary Information. The reduced SBW of the edge contact resulted in a smaller ΦB that could even approach ~0 meV in Fig. 2i owing to the substantial band bending. On the other hand, the ΦB of Ti had finite values at all Vg values, which could be attributed to the considerable impact of the SBW and TvdW.

Supplementary Note 3. Essential considerations for fair performance evaluations (i) Field-effect mobility
To determine the field-effect mobility (μFE), we considered the peak transconductance (gm = dIds/dVg) at the maximum slope of the Ids-Vg curve. This is the most frequently used technique. The field-effect mobility is then given by = . (S15) Although this approach is universally applicable, different edge-contact MSJ FET fabrication processes can result in different intrinsic, extrinsic, and device geometry-related contact effects that lead to the overestimation or underestimation of μFE. In particular, the edge-contact 3D-2D MSJ was fabricated through in situ etching of 2D semiconductors followed by deposition of 3D metal, whereas the lateral 2D-2D MSJ was fabricated through CVD. The fundamental differences between the two processes led to discrepancies in both the channel quality and producible device structure. Therefore, to perform a fair comparison of μFE values across edgecontact MSJ FETs reported in different studies, the factors that can affect the performance parameter should be considered carefully. In particular, both the short-channel effect and intrinsic mobility (μ0 instead of μFE) should be considered to avoid misinterpretation of μFE.
The μFE in short-channel devices tends to be underestimated compared to that in devices with longer L because Rch scales with L whereas Rc is independent of L (ref. 73). In our PtTe2-MoS2 MSJ FETs, L was long enough (>10 μm) for this short-channel effect to be negligible. We compared the μFE values of lateral MSJ FETs from various studies as functions of L. Our study shows that μFE in two-terminal devices (up to ~17.9 and ~10.6 ± 2.9 cm 2 V -2 s -1 on average) are higher than those in edge-contact MSJ FETs with 3D metals, but slightly smaller than those in 2D-2D MSJ FETs considering their L. The higher μFE of the reported 2D-2D MSJ FETs could be explained by the higher carrier injection due to the vertical overlap of the interface between the 2D semiconductor and 2D metals (i.e., longer LT), which was not the case in our devices ( Supplementary Fig. 21b). We can hence conclude that our devices exhibited higher μFE values than any other pure edge contacts with sub-nanometer LT.
The determination of the μ0 value using the Y-function method should also be considered if the μFE of the device is severely underestimated. The Y-function method yields the μ0 value without any Rc-related degradation and provides a good approach to understanding the intrinsic device properties. In our in-plane PtTe2-MoS2 MSJ, the μ0 values were calculated to be ~11.1 ± 4.5 cm 2 V -2 s -1 (averaged over 30 devices), which is almost comparable to the μFE values (~10.6 ± 2.9 cm 2 V -2 s -1 ) calculated using gm (see Supplementary Fig. 22 for μ0 calculation details). The insignificant difference between the values (~4.5%) implies that there was only a minor contact barrier at the edge interface with little impact on μFE.
In addition to the above considerations, the miscalculation of μFE can also be caused by the choice of the Vg sweeping direction and the top-dielectric geometry; however, our devices were unaffected by these minor considerations. The dielectric interface, and in particular the Vginduced interface traps there, can affect the hysteresis behavior of FETs, which may lead to overestimation of the gm values during the backward Vg sweep 74 . This was avoided by using the forward sweep direction (i.e., negative to positive) to obtain the gm of our devices. The coupling between the top and bottom capacitances of the dielectric oxide in the device structure may also lead to overestimation of μFE (refs. 75,76 ). It is likely that μFE has been overestimated in some previously reported devices with edge contacts and top-gated structures 39,40 because the gate capacitance was not accurately assessed. In contrast to these previous studies, our FETs were measured through the back-gated dielectric oxide (which suppressed dielectric coupling), and their actual capacitance was characterized through C-V analysis (see Methods).
Finally, we emphasize the importance of extracting μFE from multiple edge-contact FETs. This is particularly important for edge contacts considering the significant challenges in the reproducible fabrication of such devices. However, most of the reports on edge-contacted devices showed only one or two of the most promising data sets, which raises concerns for their technological feasibility. In our study, the high processability of PtTe2 allowed the fabrication of more than 30 different FETs with edge contacts. Statistical calculations can therefore be performed on μ0 and μFE.

(ii)
Contact resistance Similar to μFE, the contact resistance (Rc) is also frequently misestimated or misinterpreted. The most commonly used method to calculate Rc for edge-contact MSJ FETs is the four-point probe measurement method, which requires voltage-sensing probes to be added along the 2D channel to measure the voltage drop between the probes while Ids is applied. The voltagesensing probes should have small point-like contact areas with the channel to avoid perturbing the electric field 77 . The application of non-ideal voltage-sensing electrodes with large contact areas instead of small point-like contact areas to the channel leads to the considerable underestimation of the Rc value in four-point probe measurements because of the shunted current paths through the sensing probes. In particular, in 2D FETs, the practical constraints of both the patterning techniques and the chemical reactions of 3D metals with 2D semiconductors can result in a considerable invasion of the voltage probe contact area. According to a previous study, the Rc value obtained using the four-probe method in identical MoS2 MSJs with conventional 3D vertical contacts may be underestimated by a factor of ten 7 . Most importantly, for 2D MSJ FETs with edge contacts, the voltage-sensing probe should take the form of edge contacts to avoid mixed effects from 3D vertical metal contacts 23 . However, this scheme was not utilized in nearly all the previous studies on lateral MSJ FETs 24,37,39,42,51 . It is therefore inappropriate to compare the Rc values in these studies with those obtained using other techniques, such as the Y-function method or TLM.
The extraction of Rc using the Y-function method requires only a linear regime in the Ids-Vg transfer curve. This provides an advantage over the four-point probe measurement method and TLM because it avoids a number of issues related to variations across different channels and the reproducibility of fabricating FETs with ultrathin edge interfaces. However, the Y-function method is only applicable to a FET in which Vg has no effect on the source or drain, i.e., a device operating in the strong accumulation regime 45 . Furthermore, in contrast to the assumption that Rc is independent of Vg, Rc in actuality gradually decreases with the injected carrier density and slowly saturates towards the accumulation regime in conventional MSJ FETs. Therefore, the Y-function technique provides improved measurements only when the impact of the Schottky barrier (SB) is minimal 44,78 . This method is therefore appropriate for edge-contact MSJs with small SBH and SB widths.
Compared to the four-point probe measurement and Y-function methods, the TLM provides more accurate measurements of Rc at different values of Vg although it requires multiple FETs with different channel L. Despite its accuracy, the TLM is an extrapolation method with the important requirement that all the Rc and channel Rsh values must be consistent across metal probes. The satisfaction of this requirement in previous studies on edge contacts was challenging because of fabrication complexity and/or device-to-device variations. In contrast, the TLM patterns in our PtTe2-MoS2 MSJ FETs enabled the extraction of Rc (168 ± 127 kΩ·μm). This demonstrates their possibilities in large-scale-compatible technology and spatial control of the coplanar MS interface. The consistency of the measurements is demonstrated by the agreement of the Rc values with the average values extracted using the Y-function method (113 ± 60 kΩ·μm). The agreement of the Rc values measured over 30 devices using the two distinct methods in Fig. 4g indicates that there were minor measurement errors and substantial variance between the FETs. It should also be noted that other studies on edge contacts with 2D MoS2 typically reported only the best value obtained from four-probe point measurements 16,23,24,37,39,42,51 , which should be avoided for appropriate benchmarking.
For edge or lateral contacts with ultrashort LT (= Lc), the specific contact resistivities (ρc) rather than Rc should be evaluated and compared. This is because the Rc value is primarily affected by the thickness of the edge interface (i.e., ρc = Rc/LT) owing to the surge in current crowding with the reduction of LT. Considering the potential applications of edge contacts as ultra-scaled contact electrodes, the achievement of low values for both ρc and LT is desirable in 2D FETs. In Figure 4h, we compare the ρc and LT values of MoS2-based MSJ FETs with edge and top contacts. The values for the PtTe2-MoS2 MSJ FET were almost the same as the lowest values reported for edge contacts (ρc as low as ~11.7 Ω·μm 2 and LT of ~0.7 nm), which is promising for the realization of ultralow Rc in Lc-scale FETs. We also compared ρc as a function of n2D for a fair comparison in Supplementary Fig. 21c because the Vg-induced carrier densities (n2D) in a 2D channel can vary across different papers. Our PtTe2 edge contact showed the lowest ρc across different n2D values.
Regarding the thickness of the MoS2 channel, multilayer MoS2 (the case for refs. 5,13-15 ) could have SBH and Rc values smaller than a monolayer because of less influence of interfacial traps at the substrates 7 and the downshift of the conduction band edge in thicker MoS2 29 .